1999 IEEE Canadian Conference on Electrical and Computer Engineering

Harmanani, H.

1999 IEEE Canadian Conference on Electrical and Computer Engineering

Title: 1999 IEEE Canadian Conference on Electrical and Computer Engineering;
A method for data path synthesis using neural networks

Harmanani, H.; SAS; 199490170; Computer Science and Mathematics; haidar.harmanani@lau.edu.lb; Lebanese American University

URI: http://hdl.handle.net/10725/5486

URL: http://ieeexplore.ieee.org/abstract/document/807241/

DOI: http://dx.doi.org/10.1109/CCECE.1999.807241

Abstract:

Presents a deterministic parallel algorithm to solve the data path allocation problem in high-level synthesis. The method is based on the modified Hopfield neural network model of computation and the McCulloch-Pitts binary neuron model. The proposed algorithm has a running time complexity of O(1) for a neural network with n vertices and c cliques. A sequential simulator was implemented for the proposed algorithm on a Linux Pentium PC under X Windows. Several circuits hare been attempted, all yielding sub-optimal solutions.

Citation:

Harmanani, H. (1999, May). A method for data path synthesis using neural networks. In Electrical and Computer Engineering, 1999 IEEE Canadian Conference on (Vol. 1, pp. 456-461). IEEE.